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Global Foundries SMTS Device Engineer, Protection Circuits, ESD and Latch-up - JR-2302281-5859 in Essex Junction, Vermont

This job was posted by https://www.vermontjoblink.com : For more information, please see: https://www.vermontjoblink.com/jobs/1143230 About GlobalFoundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world\'s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:

We seek candidates with strong passion for advanced device development, new device feature definition, and for meeting project targets and objectives. The best candidates will have a healthy combination of semi-conductor device knowledge and EDA.

Essential Responsibilities:

  • Develop ESD and Latch up protection device/circuit solutions for GlobalFoundries differentiated technology portfolio
  • Design test macros for electrical characterization and JEDEC qualification. Define test plans. Execute qualification plans per industry standards.
  • Analyse electrical test data using languages such as Python and R
  • Develop ESD/ Latch-up-related physical ground rules
  • Develop supporting documentation, such as user guides and application notes
  • Submit and track failure analysis samples to understand observed failure and defect modes
  • Ensure correct process monitors are in place for robust ESD/Latch-up manufacturing
  • Collaborate closely with Quality, Reliability, and Technology teams for technology qualification
  • Work with circuit IO Design Teams to co-optimize I/O and ESD performance.

Other Responsibilities:

  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

  • BS or MS in Solid State Physics, Electrical Engineering, or other relevant engineering discipline + 10 or more years\' experience....
  • Working knowledge and experience with semiconductor process fabrication flow, nanofabrication, solid state and semiconductor device physics and design of experiments (DOE) methodology.
  • Familiarity with semiconductor physical design including electrical test structure design.
  • Practical experience using Electronic Design Automation [EDA] tools such as Cadence Virtuoso and Mentor Calibre
  • Strong data analysis, data mining and problem-solving skills.
  • Strong interpersonal skills; team player; able to work effectively in a dynamic, fast-paced environment.
  • Travel - Up to 10%
  • Fluency in English Language - written & verbal.

Preferred Qualifications:

  • PhD in Solid State Physics, Electrical Engineering, or other relevant engineering discipline + 5Yrs or more of experience
  • Deep experience with chip level ESD and Latch-up design and development.
  • Experience with device simulations tools such as TCAD.

Expected Salary Range

\$99,000.00 - \$187,900.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and elieves that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law

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