Please Note:
1. If you are a first time user, please create your candidatelogin account
before you apply for a job. (Click Sign In > Create Account)
2. If you already have a Candidate Account, please Sign-In before you apply.
Job Description:
Digital Design: SerDes Digital IP Design Engineer:
Oversees definition, design, verification co-definition, and
documentation for SerDes development. Performs architecture design, rtl
development, constraints, synthesis, timing analysis, verification,
documentation, and support for SerDes designs. Knowledge of all aspects of
the process flow from high-level RTL design to synthesis, RTL/ netlist
audits (using tools such as Spyglass), Formal verification,
constraints development and analysis w/ emphasis on CDCs in the context of
synthesis and over all use in PrimeTime, Timing model generation (ETM/
.db). Emphasis on Spyglass lint, CDC and abstract model generation along with
Knowledge:
Synthesis flows (design compiler or newer tools), lint and CDC analysis
(spyglass), constraints development and timing model creation
(primetime) along with formality is desired. Knowledge of SerDes
architecture and protocols are a plus. Knowledge of spyglass, VC spyglass,
design compiler and primetime is a must.
Job Complexity:
Works on significant and unique development and support issues where analysis
of situations or data requires an evaluation of intangibles along with an
in-depth understanding of the underlying designs and implementation techniques
used. Exercises independent judgment in methods, techniques and evaluation
criteria for obtaining results. Creates formal networks involving coordination
among groups and works well with individuals and teams spread across
geographical time-zones.
Supervision:
Acts independently to determine methods and procedures on new or special
assignments. May supervise the activities of others. Works in close
collaboration with his/her supervisor and can effectively context-switch and
multi-task based on business needs.
Qualifications and Requirements:
Bachelors in Electrical/Electronics engineering with at least 8 years or
more experience in a relevant field or Masters in Electrical/Electronics
engineering with at least 6 years or more experience in a relevant field
Familiarity with VLSI design tools for lint, CDC, synthesis, DFT
insertion, timing analysis and scripting languages.
Proficiency in UNIX/Linux
Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $91,200 - $152,000.
This position is also eligible for a discretionary annual bonus in accordance
with relevant plan documents, and equity in accordance with equity plan
documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical,
dental and vision plans, 401(K) participation including company
matching, Employee Stock Purchase Program (ESPP), Employee Assistance
Program (EAP), company paid holidays, paid sick leave and vacation
time. The company follows all applicable laws for Paid Family Leave and other
l
Broadcom is proud to be an equal opportunity employer. We will consider
qualified applicants without regard to race, color, creed, religion,
sex, sexual orientation, gender identity, national origin,
citizenship, disability status, medical condition, pregnancy,
protected veteran status or any other characteristic protected by federal,
state, or local law. We will also consider qualified applicants with arrest
and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as
this will be used for future correspondence.
Broadcom Inc. is committed to creating a diverse work environment and is proud
to be an equal opportunity employer.