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Minimum qualifications:
Bachelor's degree in Electronic Engineering, Computer Engineering, or equivalent practical experience.
Experience leading validation teams through a full cycle from concept to delivery.
Experience in people management.
Experience with high-speed Interface PHY/Controller post silicon validation activities, including electrical validation and PHY compliance.
Preferred qualifications:
Experience in embedded code development (e.g., C/C++).
Experience in DDR compliance measurements using high-end equipment (e.g., Oscilloscope, logic).
Experience in PCIe compliance measurements using high-end equipment (e.g., Analyzer, Exerciser).
Experience with development in pre-silicon tools (e.g., Field Programmable Gate Array (FPGA), Emulator).
Knowledge of ARM based SoC architecture (e.g., Boot flow, High-speed I/F initialization).
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
As a Silicon Validation High speed Interfaces Lead, you will lead and drive complex technical projects from the concept/planning stage through execution and closure. As part of our server chip design team, you will validate complex designs, collaborate closely with design, architecture, firmware and verification teams in active projects, and perform validation and characterizations of multiple high-speed interfaces. You will be responsible for the full life-cycle of the validation which can range from planning through execution, characterization and debug.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Enable and validate ownership (e.g., functional, electrical, compliance testing, performance) of multiple high-speed interfaces blocks.
Understand the design and Interact with architecture, design and verification teams to build a complete validation and characterization plan.
Lead a team of validation engineers. Plan tasks, allocate the required resources and track the overall execution.
Deliver tools to internal/external customers, for system level testing purposes.
Support system debug and integration of new Dual in-Line Memory Module (DIMM) vendors and knowledge of ARM based SoC architecture (e.g., Boot flow, High-speed I/F initialization).
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.